Demand Peripherals     Robotics and Automation Made Easy

Peripherals

Peripherals refer to user visible functions such as motor controllers, sensors, or user interface elements. Your application deals with peripherals through an ASCII based API.

 

QUICK INDEX:
   System Architecture
   Control Card Peripherals
   User Interface Peripherals
   Motion Control Peripherals
   Simple Input / Output Peripherals
   Sensor Peripherals
   Instrumentation Peripherals

 

SYSTEM ARCHITECTURE:

The diagram below shows the overall architecture of a system with a Baseboard4 and ten peripherals.

A peripherals has two parts, an FPGA part and a driver part. The FPGA part of a peripheral has the timing and logic needed to drive the four pins to each daughter card. This logic is controlled by a set of 8-bit registers which tie to an internal address and data bus. The slot of a peripheral is actually the upper four bits of the 12-bit address block assigned to that peripheral.

The FPGA internal address and data bus tie to host system though an FTDI USB-to-serial interface. On the FPGA card the physical interface to the FTDI chip is a bidirectional 8-bit data bus. Logic in the FPGA implements a parser for commands that come from the host over the FTDI link. The command set is basically just register reads and writes. An overview of this page and the protocol for the command set is described here: protocol.html. No single document describes the registers for all of the peripherals, however most of the dpdaemon driver files have the register descriptions for that peripheral.

A driver is that part of a peripheral that resides on the host and implements the API for that peripheral. Drivers are also called plug-ins in some contexts. The driver translates API reads and writes into the appropriate register read and write commands to send over the FTDI USB-to-serial interface. There is always a one-to-one correspondence between FPGA peripherals and drivers. Since they are loaded dynamically drivers are implemented as shared libraries. The dpdaemon program on the host manages the drivers, manages the TCP connections to your applications, and manages the serial link to the FPGA card.

Registers at the FPGA level are often viewed as resources at the application level. For example, the 10-bit PWM pulse width in the dual DC motor controller is visible as the "speed" resource to your application. Some resources map almost directly to the underlying FPGA registers and some resources sit at logical level well above the underlying registers. From the application point of view a peripheral is defined entirely by the resources it implements.

 

PERIPHERAL LIST:

Control Card Peripherals:
Enumerator : Lists the peripherals available in the FPGA image
BB4 Buttons & LEDs : Controls the LEDs and reads the buttons on the FPGA card
Host Serial : Replace the FTDI/USB serial with Tx/Rx Serial
AVR Interface : Program and communicate with the AVR MEGA88 on the MEGA card

User Interface Peripherals:
Stereo 3 Watt Audio Amplifier : Stereo audio amplifier with enable and volume control
Text LCD and Keypad Interface : Rotary encoder, two LEDs, buzzer, 4x5 keypad, text LCD interface
Quad WS2812 Interface : Four channels with each up 64 RGB(W) addressable LEDs

Quad Slide Pot : Four slide potentiometer with 10 bits of precision
IR Recv/Xmit : Consumer IR receiver/transmitter
6 Digit LCD : Six digit, seven segment LCD display
RC Decoder : Eight channel RC control decoder
Keyfob RF Decoder : 315/434 MHz Keyfob receiver/decoder
Rotary Encoder Interface : Rotary encoder interface with center button and output LED
Quad Touch Interface : Quad capacitive touch sensor

Motion Control:
Dual DC Motor Controller : Ten bit PWM for two DC motors
Dual Quadrature Decoder : Dual one MHz quadrature decoder
Quad 13 Bit Servo : Four servo motor controls with 50 nanosecond resolution
Bipolar Stepper Controller : Step rate, step count, and holding current for a bipolar stepper
Unipolar Stepper Controller : Step rate, step count, and holding current for a unipolar stepper

Simple Input/Output:
Quad Binary Output : Four on/off outputs
Quad Binary Input : Four on/off inputs with automatic reports on input change
Quad GPIO : Four bidirectional I/O lines with input report on change
Octal Input/Output : Eight binary outputs and eight binary inputs with report on change
32 Channel Binary Output : Thirty-two on/off outputs
32 Channel Binary Input : Thirty-two on/off inputs with automatic reports on input change
Quad Low Speed Serial Output : Four channels of serial output at from 2400 to 38400 baud
Octal Low Speed Serial Output : Eight channels of serial output at from 2400 to 38400 baud

Sensors:
Octal 12-bit ADC : Octal 12-bit analog-to-digital converter
Quad Ping))) Interface : Quad Parallax Ping))) (tm) interface
Pololu QTR Interface : Interface to the four or eight input Pololu digital QTR sensor
Octal SRF04 Interface : Eight channels of distance sensing using SRF04 sensors

Instrumentation:
Generic I2C : I2C master node operating at either 100 or 400 KHz
Generic SPI : SPI interface at 4 different frequencies using either Mode 0 or Mode 2
Octal 8-Bit DAC : Eight 8-bit Digital to Analog Converters.
Quad Digital Potentiometer : Two 50K Ohm potentiometers with 257 digitally controlled levels
Quad PWM Output : Four 12-bit PWM outputs at one of 15 common frequencies
Quad PWM Input : Four PWM input channels with 16 bits of resolution
Quad Event Counter : Four 500 KHz counters triggered on rising, falling, or both edges
Real Time Clock : Real-time clock with programmable alarm
Dual Pulse Generator : Dual non-overlapping pulse generator with 10 ns resolution