Demand Peripherals             Robotics and Automation Made Easy



Peripherals refer to user visible funcions such as motor controllers, sensors, or user interface elements. Your application deals with peripherals through an ASCII based API.


   System Architecture
   Power-Up Sequence
   Peripheral List



The diagram below shows the overall architecture of a system with a Baseboard4 and ten peripherals.

The FPGA part of a peripheral, the device, has the timing and logic needed to drive the four pins to each daughter card. This logic is controlled by a set of 8-bit registers which tie to an internal address and data bus. The slot of a peripheral is actually the upper four bits of the 12-bit address block assigned to that peripheral.

The FPGA internal address and data bus tie to host system though an FTDI USB-to-serial interface. On the FPGA card the physical interface to the FTDI chip is a bidirectional 8-bit data bus. Logic in the FPGA implements a parser for commands that come from the host over the FTDI link. The command set is basically just register reads and writes. An overview of this page and the protocol for the command set is described here: protocol.html. No single document describes the registers for all of the peripherals, however most of the dpserver driver files have the register descriptions for that peripheral.

A driver is that part of a peripheral that resides on the host and implements the API for that peripheral. The driver translates API reads and writes into the appropriate register read and write commands to send over the FTDI USB-to-serial interface. There is always a one-to-one correspondence between FPGA peripherals and drivers. Since they are loaded dynamically drivers are implemented as shared libraries. The dpserver program on the host manages the drivers, manages the TCP connections to your applications, and manages the serial link to the FPGA card.

Registers at the FPGA level are often viewed as resources at the application level. For example, the 10-bit PWM pulse width in the dual DC motor controller is visible as the "speed" resource to your applicaion. Some resources map almost directly to the underlying FPGA registers and some resources sit at logical level well above the underlying registers. From the application point of view a peripheral is defined entirely by the resources it implements.



At power-up the FPGA is unprogrammed and all FPGA pins are pulled high. You download the FPGA image (DPCore.fpga) over the USB-serial link. The image is a binary file so you have to put the serial link into a mode that does not translate a newline character into a newline and carriage return. Once the serial port is configured you can download the FPGA binary using the Linux 'cat' command. Here are the commands to load the FPGA image to a Baseboard4 that enumerated on the USB bus as ttyUSB0:
      sudo stty -F /dev/ttyUSB0 raw
      sudo cat DPCore.fpga > /dev/ttyUSB0
After the FPGA is loaded the status LED on the Baseboard4 will turn green.

It is awkward to deal with serial ports when you are not a privledged user. Since most serial ports are owned by the 'dialout' group. you may find it convenient to add youself the dialout group with the command
      sudo adduser YourName dialout
As a member of the dialout group you can use the serial port without using the sudo command.

Once the FPGA is loaded you can start the dpserver program. The only required option is the device name of the USB serial device to the FPGA card. Keeping the program in the foreground with the -f option lets you see any start-up errors. The -e option is handy to force errors to standard-out and not the system logger.

When dpserver starts it does not know what peripherals to expect in the FPGA. What is in the FPGA is listed in the enumerator peripheral which is always in slot zero. The dpserver issues dpget commands to slot zero to read the list of peripherals in the FPGA. Once it has the list it loads the driver library for each peripheral in the list. Once all of the drivers are loaded the program opens the TCP socket to listen for connection requests from your applications.



FPGA Card Peripherals:
Enumerator : Lists the peripherals available in the FPGA image
BB4 Buttons & LEDs : Controls the LEDs and reads the buttons on the FPGA card

User Interface Peripherals:
IR Recv/Xmit : Consumer IR receiver/transmitter
6 Digit LCD : Six digit, seven segment LCD display
RC Decoder : Eight channel RC control decoder
Keyfob RF Decoder : 315/434 MHz Keyfob receiver/decoder
Rotary Encoder Interface : Rotary encoder interface with center button and output LED
Quad Slide Pot : Four slide potentiometer with 10 bits of precision
User Interface Card : Rotary encoder, two LEDs, buzzer, 4x5 keypad, text LCD interface
Quad WS2812 Interface : Four channels with each up 64 RGB(W) addressable LEDs

Motion Control:
Dual DC Motor Controller : Ten bit PWM for two DC motors
Quad 13 Bit Servo : Four servo motor controls with 50 nanosecond resolution
Bipolar Stepper Controller : Step rate, step count, and holding current for a bipolar stepper
Unipolar Stepper Controller : Step rate, step count, and holding current for a unipolar stepper

Dual Quadrature Decoder : Dual one MHz quadrature decoder
Octal 12-bit ADC : Octal 12-bit analog-to-digital converter
IMU : LSM9DS0 IMU with automatic update from the device
Quad Ping))) Interface : Quad Parallax Ping))) (tm) interface
Octal SRF04 Interface : Eight channels of distance sensing using SRF04 sensors

Simple Input/Output:
Quad Binary Output : Four on/off outputs
Quad Binary Input : Four on/off inputs with automatic reports on input change
Quad GPIO : Four bidirectional I/O lines with input report on change
Octal Input/Output : Eight binary outputs and eight binary inputs with report on change
32 Channel Binary Output : Thirty-two on/off outputs
32 Channel Binary Input : Thirty-two on/off inputs with automatic reports on input change
Generic I2C : I2C master node operating at either 100 or 400 KHz
Generic SPI : SPI interface at 4 different frequencies and using either Mode 0 or Mode 2

Octal 8-Bit DAC : Eight 8-bit Digital to Analog Converters.
Dual Digital Potentiometer : Two 50K Ohm potentiometers with 257 digitally controlled levels
Quad PWM Output : Four 12-bit PWM outputs at one of 15 common frequencies
Quad PWM Input : Four PWM input channels with 16 bits of resolution
Quad Event Counter : Four 500 KHz counters triggered on rising, falling, or both edges
4 Bit Pattern Generator : Varible length (up to 4K) 4 bit pattern generator
Real Time Clock : Real-time clock with programmable alarm
Dual Watchdog Timers : Two watchdog timers with reset on any edge at the input