Demand Peripherals     Robotics and Automation Made Easy

WATCHDOG: Dual Watchdog Timers

The WATCHDOG peripherals gives an active low output when a timer expires. The counters can be reset from a user program or from an external input.

 

Hardware:

Each timer has one active-low output and one input. When a timer expires its output goes low and a message is sent to the host indicating the timer expiration. Timers can be reset under software control using a dpset command. Timers are also reset by any edge, either positive or negative, on the corresponding timer input. Having both hardware and software resets makes the watchdog timer suitable for monitoring both hardware and software systems.

The watchdog timers are 12 bit counters that expire when they reach a configurable maximum count. The counter are incremented every 100 milliseconds. The maximum timeout is just over 400 seconds.

The WATCHDOG peripheral is most often paired with one of the GPIO cards. The outputs are on connector one and three, and the inputs are on connectors two and four. More information about the GPIO4 cards is available here cards/gpio4.html.

 

Resources:

timeout0, timeout1 : timeout period.
The timout resource has the timeout period as a decimal number in the range of 0 to 4095. The timeout period is in units of tenths of a second and a value of zero disables the that watchdog timer. This resource works with both dpset and dpget.

count0, count1 : current timer counts.
The count resources gives you direct control over the watchdog counter. Use dpset to reset or pre-load the counter and dpget to get the time remaining before expiration. The value is a integer in the range of 0 to 4095 and is in units of tenths of a second.

status : indicates a timer expiration.
The status resource returns the ID of a timer when it expires. That is, it returns either '0' or '1' followed by a newline. The status resource only works with dpcat.

 

Examples:

Turn off watchdog timer 1 and set timer 0 to expire in 10 seconds. Use dpcat to watch for a timer expiration.

    dpset watchdog timeout1 0
    dpset watchdog timeout0 10
    dpcat watchdog status

 

FPGA Defined Peripherals
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